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TARGET_CYW9M2BASE-43012BT/CYW9M2BASE-43012BT.btp
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| DevicePreset "43012C0_Generic_UART_37_4MHz_wlbga_ref3_sLNA" | |
| { | |
| ConfigFSOffset = 0 | |
| DLReadWriteMode = "Cortex M3 HCI" | |
| DLWriteVerifyMode = "Write" | |
| DLMaxWriteSize = 200 | |
| DLSectorEraseMode = "Written sectors only" | |
| DLDTRReset = 0 | |
| DLPostResetDelay_ms = 100 | |
| DLAutobaud = 0 | |
| DLAutobaudRepeat = 1 | |
| DLAutobaudRepeatDelay_ms = 200 | |
| DLWaitForLaunchAnnounce = 0 | |
| DLConfigReprogramIF_PLL = 0 | |
| DLUsbBulkPipe = 0 | |
| DLMinidriver = 0 | |
| DLMinidriverPathUSB = "[MINIDRIVERS]\4335A0\usb.hex" | |
| DLMinidriverPathNET = "[MINIDRIVERS]\2045\INVALID.hex" | |
| DLMinidriverPathSDIO = "[MINIDRIVERS]\2045\INVALID.hex" | |
| DLMinidriverPathUPRX = "[MINIDRIVERS]\2045\uart_legacy_ramcfg_only.hex" | |
| DLMinidriverPathUART = "[MINIDRIVERS]\4349B0\uart.hex" | |
| DLFirmware = 0 | |
| DLFirmwareTargeting = "Standard" | |
| DLConfig = 1 | |
| DLConfigTargeting = "RAM runtime" | |
| DLConfigFixedHeader = 1 | |
| DLConfigFixedHeaderFromBurnImage = 0 | |
| DLConfigOmitRF_PLL = 0 | |
| DLConfigIncludeChargerConfig = 0 | |
| DLConfigDFUKey = 4294967295 | |
| DLConfigCrystalFreqMHzX10000 = 374000 | |
| DLConfigOutputPowerAdjust = 40 | |
| DLConfigImpedanceMatchTuning = 31 | |
| DLConfigSerialControlBaudRate = 115200 | |
| DLConfigEEPROMAccessSpeed = 100 | |
| DLConfigVSOffset = 0 | |
| ConfigDSLocation = 132 | |
| DLConfigSSLocation = 2293760 | |
| DLConfigIncludeBTWSecurityKey = 0 | |
| DLConfigVSLocation = 0 | |
| DLConfigVSLength = 0 | |
| DLConfigRemoteDeviceCount = 0 | |
| DLConfigBD_ADDRBase = "43012C00****" | |
| DLConfigFixedBD_ADDRFlag = "Can change" | |
| OTAFWUAckAllRecords = 0 | |
| OTAFWUUpdateFirmware = 1 | |
| OTAFWUUpdateConfig = 1 | |
| CustomSkipInitialHCIReset = 1 | |
| } |