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# CY8CKIT-041S-MAX BSP
## Overview
The PSoC™ 4100S Max Pioneer Kit enables you to evaluate and develop with Cypress's fifth-generation, low-power CAPSENSE™ solution using the PSoC™ 4100S Max device.
![](docs/html/board.png)
To use code from the BSP, simply include a reference to `cybsp.h`.
## Features
### Kit Features:
* World's Most Reliable, Lowest Power CAPSENSE™ Solution
* On-board Programmer and Debugger
* Ready-to-Use CAPSENSE™ Buttons
* Ready-to-Use CAPSENSE™ Touchpad
* Ready-to-Use CAPSENSE™ Slider
* Ready-to-Use CAPSENSE™ Proximity
* Thermistor
### Kit Contents:
* CY8CKIT-041S-Max PSoC™ 4100S Max Pioneer Board
* CY8CKIT-041S-Max Capacitive Sensing Expansion Board
* USB Type-A to Micro-B cable
* Six jumper wires
* 40 pin FFC cable
* Quick Start Guide
## BSP Configuration
The BSP has a few hooks that allow its behavior to be configured. Some of these items are enabled by default while others must be explicitly enabled. Items enabled by default are specified in the CY8CKIT-041S-MAX.mk file. The items that are enabled can be changed by creating a custom BSP or by editing the application makefile.
Components:
* Device specific category reference (e.g.: CAT1) - This component, enabled by default, pulls in any device specific code for this board.
Defines:
* CYBSP_WIFI_CAPABLE - This define, disabled by default, causes the BSP to initialize the interface to an onboard wireless chip if it has one.
* CY_USING_HAL - This define, enabled by default, specifies that the HAL is intended to be used by the application. This will cause the BSP to include the applicable header file and to initialize the system level drivers.
* CYBSP_CUSTOM_SYSCLK_PM_CALLBACK - This define, disabled by default, causes the BSP to skip registering its default SysClk Power Management callback, if any, and instead to invoke the application-defined function `cybsp_register_custom_sysclk_pm_callback` to register an application-specific callback.
### Clock Configuration
| Clock | Source | Output Frequency |
|----------|-----------|------------------|
| CLK_HF | CLK_IMO | 48 MHz |
### Power Configuration
* System Idle Power Mode: Deep Sleep
* VDDA Voltage: 5000 mV
* VDDD Voltage: 5000 mV
See the [BSP Setttings][settings] for additional board specific configuration settings.
## API Reference Manual
The CY8CKIT-041S-MAX Board Support Package provides a set of APIs to configure, initialize and use the board resources.
See the [BSP API Reference Manual][api] for the complete list of the provided interfaces.
## More information
* [CY8CKIT-041S-MAX BSP API Reference Manual][api]
* [CY8CKIT-041S-MAX Documentation](https://www.cypress.com/documentation/development-kitsboards/psoc-4100s-max-pioneer-kit-cy8ckit-041s-max)
* [Cypress Semiconductor, an Infineon Technologies Company](http://www.cypress.com)
* [Infineon GitHub](https://github.com/infineon)
* [ModusToolbox™](https://www.cypress.com/products/modustoolbox-software-environment)
[api]: https://infineon.github.io/TARGET_CY8CKIT-041S-MAX/html/modules.html
[settings]: https://infineon.github.io/TARGET_CY8CKIT-041S-MAX/html/md_bsp_settings.html
---
© Cypress Semiconductor Corporation (an Infineon company) or an affiliate of Cypress Semiconductor Corporation, 2019-2022.